Tektronix HFS9003 programmable stimulus system 630MHZ.


Subject: Tektronix HFS9003 programmable stimulus system 630MHZ.
Tektronix HFS9003 Programmable Stimulus System Up to 630MHz Repetition Rate, Fully Digital Implmentation,1 ps Timimng Resolution,Gpib ProgrammableMulti Channel Architecture -up to 640 or more Phase Locked Channels Independent Edge Placement.
It's missing the outside covers (it was been used as part of a system).
* Complete Stimulus Setup in Just Minutes
* Specify Data and Timing on Every Pin
* Up to 630 MHz Repetition Rate
* Fully Digital Implementation
* Multi-channel Architecture
* Up to 640 or More Phase-locked Channels
* Independent Edge Placement
* Precision Channel-to-channel Timing Alignment
* GPIB (IEEE 488) Programmable
* Maximum Control and Flexibility
* Characterize CMOS, ECL, ACL, BiCMOS and GaAs Devices
When product designs were simple, and time-to-market not so critical, designers could afford the days, or even weeks, necessary to assemble, program, debug and characterize the various elements of a stimulus system and its fixturing. As product design complexity and market pressures have increased, however, designers of high-speed, high-performance circuits simply cannot afford this expenditure in time.
Now there's a solution. With Tektronix HFS9000 Stimulus Systems we've taken the features of a high-performance pulse generator, made them better and added complete data generation capabilities as well. We've eliminated the need for a switch matrix since we have data and timing on every pin. And the need for a separate power supply is gone, as the HFS9000 has the ability to produce the DC levels needed to drive logic lines directly. Finally, all these capabilities are present on every pin simultaneously, so you get extremely flexible formatting. Now you can set up a complete stimulus system in minutes, rather than hours or days, and test products more thoroughly throughout the development cycle.
The HFS9000 Series products were designed as completely programmable digital instruments rather than being based on traditional monostable analog architecture. This allows more capability and flexibility in pulse edge placement without the restrictions that analog instruments commonly impose. Now you can adjust both Delay and Width from 0 to 20 µs over all frequencies.
You can build a stimulus system with from four to 36 channels in one mainframe, and 640 or more channels across multiple phase-locked mainframes. Choose from the HFS9003 mainframe with 3-slot, 12-Channel capability, or the HFS9009 mainframe with 9-slot, 36-Channel capability. Both systems can include the 4-Channel HFS9DG1 and HFS9DG2 Data Time Generator cards in any combination.
All channels are slaved to a common clock, resulting in highly accurate channel-to-channel edge placement. This makes the HFS9000 ideal for precise characterization and evaluation of synchronous devices having multiple, and possibly interactive, inputs.
Full Channel Deskew Capability
All HFS9000 channels have independent, wide deskew ranges to allow precise pulse alignment and timing at the device under test (DUT). Deskew compensates for the timing differences caused by cabling and fixturing so your analysis can be focused on the relative timing at the DUT.
No other system lets you generate whatever combination of signals is required, with data and timing on every pin with 1 ps resolution. Now you can create data buses, clocks, strobes, gated clocks, logic level sources, pseudorandom bits and other stimuli with unequaled accuracy. You can perform setup and hold time margin tests by providing the clock, data, set and reset signals to the DUT. And you can hold inactive signals at programmable high or low logic levels, eliminating the need for external DC voltage sources and microwave switches.
Accurate and repeatable AC measurements of prop delay, setup and hold time, and maximum operating frequency (fmax) require fast rep rates and edge speeds. With repetition rates up to 630 MHz, the HFS9000 is ideal for characterizing the most advanced logic families, and it can be used for testing component compliance with the SONET telecommunications standard. Transition times as fast as 250 ps (20%-80%) enable repeatable and accurate testing of the highest-speed ECL and GaAs digital devices. Variable transition time control from 800 ps to 6 ns is also available with the appropriate output levels for testing advanced CMOS, BiCMOS and TTL logic families.
Programmability is important in developing automated, repeatable tests in R&D, incoming inspection and production of high-speed components. Therefore, the HFS9000 offers full implementation of the IEEE 488.2 standard and utilizes Tektronix Codes and Formats. GPIB/RS-232 ports provide for remote, fully programmable control. Coupled with a high-speed acquisition system, such as the TDS694D DSO, 11801B Digital Sampling Oscilloscope, or the most advanced logic analysis system on the market - the Tektronix TLA700, a fully automated test system can be developed with unequaled accuracy and repeatability.
Phase lock-in allows the internal time base to be phase-locked to an external frequency source. This "supercharger" capability can be used to augment the speed performance of automated component test systems by creating synchronized signals as fast as 630 MHz.
Card-modular design lets you adapt to any logic family from within the same mainframe. Choose the HFS9DG1 Data Time Generator card for 630 MHz bandwidth and <250 ps fixed rise time. The HFS9DG1 provides four channels of stimulus. This card is ideal for ECL and GaAs device characterization.
Or, choose the HFS9DG2 Data Time Generator card for up to 315 MHz bandwidth and variable transition times from 800 ps to 6 ns. The HFS9DG2 provides four channels of stimulus. This card is ideal for simulating TTL, CMOS and BiCMOS logic signals.
Combine these cards in any combination for testing a broad range of components or systems with mixed logic families.
Capabilities like these allow you to perform full characterizations on the first run, lowering your development costs and reducing your time to market.
HIGH Level Accuracy - ±2% of level ±50 mV.
LOW Level Accuracy - ±2% of HIGH level ±2% of amplitude ±50 mV.
Output Aberrations (200 ps after 50% pt.) - Overshoot: +15% +20 mV. Undershoot: -10% -20 mV.
Frequency Range - 50 kHz to 630 MHz.
Frequency Resolution - <0.1% of programmed value.
Frequency Accuracy - ±1% of programmed value.
RMS Jitter - 15 ps ±0.05% of interval.
PHASE LOCK IN Frequency Range - 6 MHz to 630 MHz.
PHASE LOCK IN Amplitude Range - 0.8 V to 1.0 Vp-p.
Output Frequency Range - Any 2n multiple or submultiple of PHASE LOCK IN frequency. Must remain inside the allowed frequency range for installed cards.
FRAME SYNC IN - Initiates a burst when using PHASE LOCK IN external frequency reference.
Output Edge Placement Performance
Channel Deskew Range - Minus 60 ns to 2.0 µs.
Channel Deskew Resolution - 1 ps.
DELAY Adjust Range - 0 to 20 µs.
DELAY Adjust Resolution - 1 ps.
WIDTH Adjust Range - 0 to 65,536 x one period.
WIDTH Adjust Resolution - 1 ps.
WIDTH Accuracy - HFS9DG1: 1% of width ±50 ps; HFS9DG2: 1% of width +50 ps -250 ps.
Output transition time (20% to 80%)
Input Voltage Range - ±5 V maximum.
Programmable Threshold Range - 4.70 V to +4.70 V.
Programmable Threshold Resolution - 100 mV.
Programmable Threshold Accuracy - ±100 mV ±5% of level.
Minimum Input Pulse Width - 1 ns.
Input Rise/Fall Time Requirement - <10 ns.
Line Voltage Ranges - 90 V AC to 130 V AC RMS, and 180 V AC to 250 V AC RMS; range switched automatically for HFS9003 (factory configured for HFS9009).
Line Frequency - 48 Hz to 63 Hz.
Temperature - Operating: 0° to +50°C (HFS9003); 0° to +40°C (HFS9009). Nonoperating: -40° to +75°C.
Humidity - 10°C to +30°C up to 95% relative humidity. 30°C to 40°C up to 75% relative humidity.
All Items sell with 5 days right of return, and 15 days GUARANTEE on all parts and labor.